1. Field of the Invention
The present invention relates to a position detecting apparatus of a rotary type or linear type which detects a position of a machine tool or the like.
2. Description of the Related Art
A conventional position detecting apparatus, e.g., a position detector will be described by taking an optical encoder as an example. As a method of obtaining an absolute encoder of high resolution, known is a method which is disclosed in, for example, JP-B-5-65827. In the method, an analog signal such as a sinusoidal wave or a triangular wave which is output in accordance with the rotation angle, and an analog signal having a predetermined phase difference with respect to the analog signal are A/D converted, and interpolation is performed by a calculating process. FIG. 11 is a diagram of the configuration of a conventional encoder according to the method.
Referring to the figure, the case where an amplifying section 5 has only two amplifying circuits will be described. With respect to light emitted from a light emitting section 1, the amount of light reaching a light receiving section 3 is changed by a screen plate 2 attached to a position detection object. The light receiving section 3 generates a signal which is proportional to the amount of the reaching light.
When the slit shape of the screen plate 2 is appropriately set and a light receiving element 4A and a light receiving element 4B are appropriately arranged, the light receiving element 4A and the light receiving element 4B generates sinusoidal signals which are different in phase from each other by 90.degree. (hereinafter, such signals are referred to as a SIN signal and a COS signal, respectively).
These signals are amplified by an amplifying section 5, simultaneously held by a sample hold circuit 6 in synchronization with a request signal from an external controller, and then input from the sample hold circuit 6 into a multiplexer 8 of a one-chip microcomputer 7. Since the analog signals are simultaneously held by the sample hold circuit 6, the synchronism of the SIN signal and the COS signal is maintained.
The two hold outputs from the sample hold circuit 6 are sequentially selected by the multiplexer 8, and converted in sequence into a digital data by an A/D converter 9.
The converted digital data are converted into position data by a CPU 10, and output from a transmitting and receiving circuit 14 to the external controller.
The CPU 10 calculates a TAN signal (tangent signal) from the SIN signal (sine signal) and the COS signal (cosine signal) based on the converted digital data, and obtains a position data from a TAN.sup.-1 table which is stored in a ROM 11.
The reference numeral 13 denotes an output circuit which outputs a sample hold signal to the sample hold circuit 6 in synchronization with the request signal from the external controller, and 12 denotes a RAM which stores data required for calculation.
Next, the case where the amplifying section 5 has amplifying circuits, the number of which is even and equal to or greater than four will be described with reference to FIG. 11. In order to obtain an absolute encoder of high resolution, the screen plate 2 and the light receiving section 3 are configured so that plural pairs of the SIN signal and the COS signal are output at different cycles. The sample hold circuit 6 simultaneously holds each pair of the SIN signal and the COS signal, and then inputs the signals into the one-chip microcomputer 7.
As a result of the same process as that described above, an electrical angle data is obtained for each pair of the SIN signal and the COS signal.
The CPU 10 weights each of the electrical angle data for each cycle, and then superposes the data to calculate an absolute data.
FIG. 12 is a view showing a superposition method which has 9-bit interpolation resolution, and which is used in the case where an electrical angle data of one cycle per revolution (hereinafter, referred to as 1-wave data), an electrical angle data of 16 cycles per revolution (hereinafter, referred to as 16-wave data), and an electrical angle data of 256 cycles per revolution (hereinafter, referred to as 256-wave data) are superposed.
In the 16-wave data, a data weight with respect to the 1-wave data is 1/16 (1/2.sup.4), and, in the 256-wave data, a data weight with respect to the 1-wave data is 1/256 (1/2.sup.8) Therefore, the 16-wave data is combined with being shifted by 4 bits with respect to the 1-wave data in the direction of the LSB, and the 256-wave data is combined with being shifted by 8 bits with respect to the 1-wave data in the direction of the LSB. When two 9-bit data are superposed with shifting one of the data by 4 bits, the 5 bits are superposed.
In each data, higher bits are superior in data reliability than lower bits. In synthesis, therefore, higher bits of the 16-wave data are used as the 5 bits in which the 1-wave data and the 16-wave data are superposed, and higher bits of the 256-wave data are used as the 5 bits in which the 16-wave data and the 256-wave data are superposed.
FIG. 13 is a timing chart showing the operation of a conventional absolute encoder. As shown in the figure, the sample hold circuit 6 simultaneously holds one pair of the SIN signal and the COS signal, or plural pairs of the SIN signal and the COS signal of different cycles in synchronization with a request signal from an external apparatus, and sequentially performs A/D conversions.
When the A/D conversions are completed, the CPU 10 calculates a position data on the basis of results of the conversions, and at a time (T.sub.n +T.sub.d) transmits serially a position data .theta.(T.sub.n) at a time T.sub.n to the external apparatus via the transmitting and receiving circuit 14.
As described above, in the conventional apparatus, a long time period must elapse from the holding of analog signals to the transmission of a position data, and hence the position data is output with a delay corresponding to T.sub.d. In the case where a position detection object is moved (rotated) at a high speed, it is impossible to obtain satisfactory servo control characteristics because of the delay time.
As a method of correcting such a delay time, known is a method which is disclosed in, for example, JP-A-8-261794. In the method, a moving distance of a position detection object during a delay time is predicted by using a position data which is sampled at the present time, and position data which are sampled at the last and preceding times. The predicted moving distance is added to the position data at the present time, and a result of the addition is output.
According to the conventional position detecting apparatus described above, miniaturization and reduction of the cost can be realized by using a one-chip microcomputer incorporated in the A/D converter. A one-chip microcomputer of a low cost is usually configured so that one A/D converter is incorporated, and a multiplexer is disposed in the input of the converter to increase analog input channels, and hence cannot simultaneously A/D convert plural analog inputs. In the case where the synchronism of plural analog signals must be maintained, therefore, it is required to prepare sample hold circuits, the number of which is equal to that of signals.
In the case where a position detection object is moved, when no sample hold circuit is used, with respect to a data which is first A/D converted, another data is a data at the timing when movement for the time period required for the A/D conversion is performed. A position data which is calculated by using these data contains an error. In the case where a position detection object is moved at a high speed, particularly, such an error becomes large and servo control characteristics are largely impaired.
In the case where electrical angle data of different cycles are to be combined with one other, the synchronism among the electrical angle data of each cycles is not maintained, and hence the electrical angle data cannot be correctly combined. This phenomenon is remarkable in the case where a position detection object is moved at a high speed.
A sample hold circuit is configured by an analog switch, a capacitor for holding a signal, and a voltage follower circuit. Therefore, in the case where plural pairs of a SIN signal and a COS signal of different cycles are required, particularly, the number of parts is increased, thereby impeding miniaturization and reduction of the cost.
In a conventional position detecting apparatus, an amplifying section is configured so as to have an integrator in order to attain stability of a circuit, and, in a sample hold circuit, a low-pass filter is configured in a circuit in order to charge a capacitor.
In the case where a position detection object is moved (rotated) at a high speed, the frequency of an analog signal is high. Therefore, a phase lag due to the integrator and the low-pass filter increases the phase shift among plural electrical angle data of different cycles.
As a result, there arises a problem in that plural electrical angle data of different cycles cannot be correctly combined with one other.
For example, a case will be considered in which, in a signal configuration consisting of a sinusoidal wave of one cycle per revolution (referred to as 1 SIN), a cosinusoidal wave of one cycle per revolution (referred to as 1 COS), a sinusoidal wave of 16 cycles per revolution (referred to as 16 SIN), a cosinusoidal wave of 16 cycles per revolution (referred to as 16 COS), a sinusoidal wave of 256 cycles per revolution (referred to as 256 SIN), a cosinusoidal wave of 256 cycle per revolution (referred to as 256 COS), a sinusoidal wave of 2048 cycles per revolution (referred to as 2048 SIN), and a cosinusoidal wave of 2048 cycles per revolution (referred to as 2048 COS), the amplifying circuits of the amplifying section 5 are configured by a resistor R.sub.a =100 k.OMEGA. and a capacitor C.sub.a =100 pF, and, in the sample hold circuit, low-pass filters of R.sub.s =100.OMEGA. and a capacitor C.sub.s =1000 pF are configured. In the case where a rotary motor is rotated at 6000 rpm, a phase shift which will be described below is produced.
When the frequencies of 1 SIN and 1 COS are indicated by f.sub.1, the frequencies of 16 SIN and 16 COS are indicated by f.sub.16, the frequencies of 256 SIN and 256 COS are indicated by f.sub.256, and the frequencies of 2048 SIN and 2048 COS are indicated by f.sub.2048, the followings are attained:
f.sub.1 =6000/60=100.0 (Hz)
f.sub.16 =(6000/60).multidot.16=1.6 (kHz)
f.sub.256 =(6000/60).multidot.256=25.6 (kHz)
f.sub.2048 =(6000/60).multidot.2048=204.8 (kHz).
The phase lag (the phase lag at the timing when input to the multiplexer 8 is performed) .phi..sub.d in an analog signal processing section is expressed by: EQU .phi..sub.d =-tan.sup.-1 (2.pi.f.multidot.C.sub.a.multidot.R.sub.a)-tan.sup.-1 (2.pi.f.multidot.C.sub.s R.sub.s).
When the phase lag of 1 SIN and 1 COS is indicated by .phi.1, the phase lag of 16 SIN and 16 COS is indicated by .phi..sub.16, the phase lag of 256 SIN and 256 COS is indicated by .phi..sub.256, and the phase lag of 2048 SIN and 2048 COS is indicated by .phi..sub.2048, the followings are attained: EQU .phi..sub.1 =-tan.sup.-1 (2.pi..multidot.100.multidot.100.multidot.10.sup. 3.multidot.100.multidot.10.sup.-12)-tan.sup.-1 (2.pi..multidot.100.multidot.100.multidot.1000.multidot.10.sup.-12)=-0. 396.degree. EQU .phi..sub.16 =-tan.sup.-1 (2.pi..multidot.1600.multidot.100.multidot.10.sup. 3.multidot.100.multidot.10.sup.-12)-tan.sup.-1 (2.pi..multidot.1600.multidot.100.multidot.1000.multidot.10.sup.-12)=-5. 80.degree. EQU .phi..sub.256 =-tan.sup.-1 (2.pi..multidot.25600.multidot.100.multidot.10.sup. 3.multidot.100.multidot.10.sup.-12)-tan.sup.-1 (2.pi..multidot.25600.multidot.100.multidot.1000.multidot.10.sup.-12)=-59. 05.degree. EQU .phi..sub.2048 =-tan.sup.-1 (2.pi..multidot.204800.multidot.100.multidot.10.sup. 3.multidot.100.multidot.10.sup.-12)-tan.sup.-1 (2.pi..multidot.204800.multidot.100.multidot.1000.multidot.10.sup. -12)=-92.88.degree.
When the phase lag in a signal of 2048 cycles per revolution (hereinafter, referred to as 2048-cycle signal) is reduced to a signal of 256 cycles per revolution (hereinafter, referred to as 256-cycle signal), EQU .phi..sub.2048 /8=-92.88/8=-11.61.degree..
Therefore, the 256-cycle signal lags the 2048-cycle signal by: EQU .phi..sub.256 -(-11.61)=-59.05-(-11.61)=-47.44.degree.
(corresponding to the 256-cycle signal).
The phase variation which is allowable for combining position data is: EQU (256/2048).multidot.360.degree.=45.degree.
Therefore, the lag exceeds the allowable phase variation, and the position data cannot be correctly combined.